MITCH

(Founder CEO)

Mitch has over 40 years’ experience in circuit design and has a solid track record in both design and Project/Program Management.

He started his career at IBM in 1979 doing device level layout and circuit design on state-of-the-art Bipolar SRAM’s. Here he also worked on testing Auto Place and Route (APR) tools and developing new test methodologies. In 1995 he joined Intel, Arizona and worked on high-speed serial I/O including PCI-Express, USB 2.0, CSI, and LVDS. He also managed design groups on various projects and developed circuits from concept to silicon. He has worked in every phase of IC design from process selection and chip definition to final test and Product engineering.

He holds two patents, on USB 2.0 and was largely responsible for its selection for the High Speed Serial I/O of choice vs. 1394 (firewire).

STEVE

(Senior Analog Circuit Design Lead)

Steve is an Analog Electronics Integrated Circuit Designer with 40+ years of experience with a wide range of skills and expertise. Spending much of his career as a contractor and independent business owner, he has seen and tackled many challenges in the field. His experience includes designing and developing ultra-low power circuits (a specialty), precision voltage references, voltage and current regulators (including LDOs), amplifiers, crystal oscillators (including a groundbreaking 32KHz), PLLs, frequency synthesizers, and SERDES, in a wide range of integrated circuit technologies. He also has expertise in Digital to Analog and Analog to Digital conversion (DAC and ADC), and temperature sensors. Steve is also fully versed in Mixed-Signal design and use of the tools of the trade.

Another area of expertise is in porting IC chips from one technology to another. Often analog circuits require careful adjustment to make them work in a new or different technology.

From writing and marketing his own Circuit simulator to designing unique solutions for today’s challenges and newest process nodes, Steve is a true Renaissance Man of the Integrated design world.

Despite his career as a contractor Steve has also managed to be the holder of several patents as well.

SUZANNE

(VP-Mask Design Engineering)

Suzanne has over 20 years experience as a Senior RFIC Layout Designer: Hands-on, known for her precision and accuracy, she is highly motivated, and respected by her colleagues for her excellent work ethic.

She has performed as key layout lead with strong people, team-building, and project management skills. Suzanne has successfully assisted in the design of millions of dollars of products for several Fortune 500 companies, as well as small startups with a “do what it takes to complete the job” attitude.

With an Associates in Electronics Technology, and a BS in Business Management, along with her extensive experience in industry, Suzanne exemplifies the Consummate Professional, taking ownership of her work, and working closely with the members of her team.

JANELLE.

(VP-Mask Design Engineering)

Janelle, a second-generation Mask Designer, has over 20 years experience as a hands-on IC layout Design Engineer, and Engineering Lead. She began learning Mask Design from her mother, a well-known, and respected engineer in the industry.

Janelle has a wide range of experience working in various technologies, including many of the industry’s leading edge process nodes at exciting startups, in addition to having extensive experience working with large public companies in different sectors including: commercial, medical, aerospace, and military defense applications.

Possessing excellent communication skills, working with either teams or individual contributors comes naturally. She has a proven track record leading a wide range of projects, from block level to Tape Out. In addition to Custom RF, Analog, Mixed Signal, and Top-Level Integration, she also possesses Chip Level Packaging, and routing experience.

A great technical team not only needs great technical talent, but great communicators, as well as problem solvers who have mutual respect for one another to complete a project successfully. This is what makes Janelle a perfect fit for SandChip Semiconductor.

ABOUT RON

(Logic Design, Pre/Post Validation Engineer)

We are very lucky to have Ron on our team! His wide ranging experience not only in design but in prototyping is a tremendous asset.He has experience not only in pre silicon product and process simulation, but post silicon problem solving and root cause evaluation, is invaluable. He has solved intense manufacturing issues both as team member as well as team leader, stabilizing yield issues greater than 50 DPM significantly reducing costs.

The list of his contributions to industry standard products is long and we are proud to have him on the team!.